Course Details
Course Information Package
Course Unit Title | COMPUTER ARCHITECTURE I | ||||||||||
Course Unit Code | ACOE201 | ||||||||||
Course Unit Details | |||||||||||
Number of ECTS credits allocated | 7 | ||||||||||
Learning Outcomes of the course unit | By the end of the course, the students should be able to:
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Mode of Delivery | Face-to-face | ||||||||||
Prerequisites | ACOE161 | Co-requisites | NONE | ||||||||
Recommended optional program components | NONE | ||||||||||
Course Contents | Introduction to computer organization and architecture: Instruction cycle and flow of information at the register level. Instruction Set Architectures, instruction formats and instruction decoding. Relation between machine language, assembly language and high level languages.
CPU design basics: Datapaths, register files, ALU, shift and rotate circuits. Register transfer operations and micro-operations. Control unit implementation, hardwired control and microprogrammed control. Single-cycle and multi-cycle non-pipelined CPU design.
Semiconductor Memory: Internal structure of semiconductor memory devices, signals and basic characteristics. Types of memory devices, ROM (masked, programmable, flash) and RAM (dynamic and static). Memory expansion and memory addressing.
Memory Hierarchy: The memory wall problem and the locality principle. Cache memory organization and mapping. Cache replacement and write policies. Cache performance metrics. Virtual memory.
Laboratory Work: Individual or small group experiments performed with the use of common FPGA boards and VHDL. Experiments include the design and analysis of the basic units of a typical CPU such as register files, ALUs, memory devices and simple cache units. | ||||||||||
Recommended and/or required reading: | |||||||||||
Textbooks |
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References |
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Planned learning activities and teaching methods | The taught part of course is delivered to the students by means of lectures, conducted with the help of computer presentations. Lecture notes and presentations are available through the web for students to use in combination with the textbooks. Lectures are supplemented with laboratory work carried out on FPGA boards. During laboratory sessions, students develop the functional units, taught in the lecture sessions, in schematic and VHDL description, download them on an FPGA board and verify their operation. | ||||||||||
Assessment methods and criteria |
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Language of instruction | English | ||||||||||
Work placement(s) | NO |