BSc in Computer Science / Бакалавр в Области Компьютерных Наук

Course Details

Course Information Package

Course Unit TitleCOMPUTER ARCHITECTURE II
Course Unit CodeACOE301
Course Unit Details
Number of ECTS credits allocated5
Learning Outcomes of the course unitBy the end of the course, the students should be able to:
  1. Describe the evolution of computer architecture and the factors involved in it.
  2. Evaluate and compare the performance of computer systems through the use of common metrics and benchmarks.
  3. Develop assembly programs for RISC processors.
  4. List the advantages and limitations of current microprocessor features such as pipelining, caches and virtual memory.
  5. Design complex digital circuits required for the implementation of the functional units of computer hardware.
Mode of DeliveryFace-to-face
PrerequisitesACOE201Co-requisitesNONE
Recommended optional program componentsNONE
Course Contents�  Introduction to Computer Architecture: Organisation and abstraction of a computer. ISAs. Emerging computer architecture technologies. Processor, caches, memory and I/O devices. 
�  Performance Metrics: Measuring performance and metrics. Improve performance, clock cycles, CPI, instructions count, MIPS, MOPS, MFLOPs. Benchmarks. Amdahl's Law.  
�  Instruction Set Architecture (ISA): Specifications, classes, registers, memory addressing and addressing modes. The complete MIPS architecture and in-depth analysis. The 80x86 and Pentium 4 processors. Compilers and ISAs. 
�  RISC Processor Design: Full ALU design of the MIPS processor.  Multiplication and division algorithms in hardware. Single-cycle, multi-cycle data path and controller design.  
�  Pipelining: Single-cycle, Multi-cycle versus Pipeline. Structural, data and control hazards. Forwarding. Exceptions. MIPS R3000 pipeline and design of a pipelined processor. Loop unrolling in scalar and superscalar computer systems. Software pipelining. 
�  Memory Hierarchy: Locality and memory hierarchy. SRAM and DRAM. Memory organization. Advanced cache memory. Virtual memory. Protection. Translation Lookaside Buffer (TLB).
Recommended and/or required reading:
Textbooks
  • Paterson, Hennessy, Computer Organisation and Design: the Hardware/Software Interface, Morgan Kaufman, 2003.
References
  • M. Mano, C. R. Kime, Logic and Computer Design Fundamentals, Prentice Hall, 2004
  • J. P. Hayes, Computer Architecture and Organization, 3Ed, McGraw Hill., 1998
Planned learning activities and teaching methodsThe course is structured in lectures that are conducted with the help of both computer presentations and traditional means. Practical examples and exercises are included in the lectures to enhance the material learning process. Often short post-lecture quizzes are used to assess the level of student understanding and provide feedback. Student questions are addressed during the lecture, or privately after the lecture or during office hours.
Lecture notes are available through the web for students to use in combination with the textbooks.
Students are assessed continuously and their knowledge is checked through tests with their assessment weight, date and time being set at the beginning of the semester via the course outline.
Furthermore, individual and group design assignments are used to develop practical engineering skills.
Laboratory experiments are carried out in small groups and lab reports are required two weeks after the laboratory class resulting in a cumulative mark. The first laboratory exercises are totally structured (cookbook) in order to familiarize the students with the equipment, while later exercises are less structured, allowing the student to create their own designs or programs for a given application.
Assessment methods and criteria
Assignments10%
Tests10%
Laboratory work20%
Final Exam60%
Language of instructionEnglish
Work placement(s)NO

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